1. Field of The Invention
The present invention relates to a bus type clock providing system in a communication system connected with a digital communication network and a method therefor.
2. Description of The Related Art
In a conventional digital communication network, when communication apparatuses having clocks of frequencies different from each other in the network communicate to each other, a so-called master-slave synchronization system, in which the different apparatuses are synchronized on the basis of a clock sent from a central processing unit (CPU) supervising and controlling the whole network, has been adopted as one of frequency synchronizing techniques.
As described in Shinichi Aizawa, "Yasasii Digital Kokan (Easy Digital Exchange)" (published by Denki Tsushin Kyokai (Electric Communication Association) on January, 1983), pp. 156.about.161 (in Japanese), the system for supplying clocks to communication apparatuses in a digital communication network provides an independent doubled network clock device (NCLK) and clocks are supplied to necessary portions of communication apparatuses connected with the clock device in star form.
FIG. 4 shows an example indicating the structure of a conventional clock supplying system using the doubled clock device.
The conventional doubled clock supplying system is so constructed that a reference clock is supplied from the doubled network clock supplying device (NCLK), in which two clock cards 15 and 15' function complimentarily as an act system and a standby system, respectively, to a plurality of communication cards (communication packages) 14. Here, each of the communication cards includes a receiving circuit section 6 and a transmitting circuit section 7, which receive and transmit data from and to apparatuses connected therewith through transmission lines.
Each of the clock cards 15 and 15' includes a dependent clock selector 16 or 16' working to select a predetermined dependent clock indicated by the central processing unit, not shown in the figure, among a plurality of clocks, which are extracted from transmission lines connected with the relevant communication cards 14 and sent to the relevant clock card through a frequency divider 8, and a phase locked loop circuit (PLL) 17 or 17'. The phase locked loop circuit (PLL) 17 is cross-connected through a clock card system cross-connecting line 18 with the phase locked loop circuit (PLL) 17' in the other clock card system connected complimentarily therewith and constructed so as to be able to select a transmission line before switching-over, when the act system/standby system in the network clock device is switched-over from each other.
The communication card 14 of the conventional system, in which the reference clock is supplied from the network clock device, is composed of a receiving circuit section 6, a transmitting circuit section 7 having a function of terminating a physical layer of the transmission line, a frequency dividing circuit 8, which divides the frequency of the clock extracted from a line connected with the communication card to obtain the reference clock having the frequency of the clock bus, a frequency multiplying circuit (including PLL, phase locked loop circuit) 12, which multiplies the frequency of the reference clock to obtain a frequency necessary for the communication card, and a clock monitoring and controlling circuit 13 for detecting PLL troubles, etc., in the frequency multiplying circuit such as interruption of clock input, deviation between the outputted clock and the inputted clock in phase, and interruption of clock output.
This communication card 14 is so constructed that the clock receiving section receiving the clock from the NCLK 19 selects the reference clock, which is either one of two sorts of the act system/standby system, through the clock monitoring and controlling circuit 13.
Since the reference clock supplying system in the conventional communication system is constructed as described above, it has following problems.
(1) In order to secure reliability of the clock, it is necessary to double the clock and therefore two systems of clock cards independent from each other, i.e. an act system and a standby system are required;
(2) Since the clock cards are doubled in the network clock device, it is necessary to control the doubled clock cards;
(3) PLLs for stabilizing the clock are required both in the clock card and in the communication card; and
(4) Since a plurality of communication cards are connected with the network clock device in star form, when many communication cards are installed and the number of dependent clock sources increases, a number of clock lines are required for inputting dependent clocks to the dependent clock selector 16. In this case, when setting of the priority of the dependent clocks is effected by hardware, the connection of the dependent clock selector is also complicated. Furthermore another problem is that the clock supplying circuit in a communication apparatus installed in the network is complicated, such as the number of lines connecting the phase locked loop circuits 17 and 17' in the network clock device with the clock monitoring device 13 in every communication card is increased, etc.